1) Security fix: Stopped possible MMIO access to PCI DMA area for the
unichrome Pro.
2) Fixed an odd cpu usage problem by padding small AGP DMA submissions.
Bumped patchlevel.
New PCI command parser. Moved from via_dma.c to via_verifier.c so functions
with similar functionality are close to eachother.
Moved video related functions to via_video.c, which might be extended in
the future, as new video functionality is added.
New device-specific generic IRQ IOCTL, similar to the general VBLANK IOCTL,
but with support for multiple device IRQ sources and functionality.
Support for Unichrome Pro PM800/CN400 video DMA commands in verifier and
PCI parser.
Support for Unichrome Pro PM800/CN400 HQV IRQs in the new generic IRQ
IOCTL.
Bumped minor. New version 2.6.0.
1. Initialize futex locks to zero on device init.
2. Remove some stray defines from via_drm.h
3. Prepare via_drm.h for drm client inclusion. The goal is to share a
common file with common definitions.
4. Sync shared / shared-core via_drm.h
5. Bump minor, because of the futex lock initialization.
after ~5min: buffer aging was subtly broken. Part of this may have also
affected vertex DMA buffer aging and client-side texture heap aging,
though with less fatal consequences. Bumped minor version and driver
date.
command and vertex DMA don't work at the same time. Command DMA
performance is superior and works with all vertex formats. Bumped minor
version and driver date.
event counters in the SAVAGE_EVENT_EMIT/WAIT ioctls. This is needed for
reliable client-side texture heap aging. Slightly simplified DMA buffer
aging while at it. Bumped minor version and driver date.
privileges on Radeon hardware. Essentially, a malicious program could
submit a packet containing an offset (possibly in main memory) to be
rendered from/to, while a separate thread switched that offset in
userspace rapidly between a valid value and an invalid one.
radeon_check_and_fixup_offset() would pull the offset in from user
space, check it, and spit it back out to user space to be copied in
later by the emit code. It would sometimes catch the bad value, but
sometimes the malicious program could modify it after the check and get
an invalid offset rendered from/to.
Fix this by allocating a temporary buffer and copying the data in at once.
While here, make the cliprects stuff not do the VERIFYAREA_READ and
COPY_FROM_USER_UNCHECKED gymnastics, avoiding a lock order reversal on
FreeBSD. Performance impact is negligible -- no difference on r200 to
~1% improvement on rv200 in quake3 tests (P4 1Ghz, demofour at
1024x768, n=4 or 5).
FreeBSD. Add drm_get_resource_{start|len} so linux-specific stuff
doesn't need to be in shared code.
- Fix mach64 build by using __DECONST to work around passing a const
pointer to useracc, which is unfortunately not marked const.
- Get rid of a lot of maplist code by not having dev->maplist be a pointer,
and by sticking the link entries directly in drm_local_map_t rather
than having a separate structure for the linked list.
- Factor out map uninit and removal into its own routine, rather than
duplicating in both drm_takedown() and drm_rmmap().
- Hook up more driver functions, and correct FreeBSD-specific bits of
radeon_cp.c, making radeon work.
- Baby steps towards using bus_space as we should.
Implemented SAVAGE_CMD_DMA_IDX and SAVAGE_CMD_VB_IDX for ELTs support in
the _savage_render_stage of the 3D driver
Bumped minor version and driver date
The attached patch adds a new buffer type DRM_FB_BUFFER. It works like AGP
memory but uses video memory.
From: austinyuan@viatech.com.cn (fd.o bug 1668) Signed-off-by: Dave Airlie
<airlied@linux.ie>
passed to the cmdbuf ioctl (try xeyes on top of glxgears ;-)
Tightened the texture state check
Bumped Savage DRM version to 2.1.0 so that DRI driver can (theoretically)
depend on the DRM to manage the scissor registers
Release video futexes when context is destroyed (This was previously done
by the X server).
Added New Unichrome Pro VIDEO DMA commands to the verifier.
Added Quiescent heavyweight lock mode.
implementation errors). Direct hardware (MMIO, BCI) access is no longer
needed in the Mesa driver. Bumped version to 2.0.0. Corresponding
changes to the DDX and Mesa drivers are being committed.
bug in the cmdbuf_size ioctl. Modified ring-buffer jump code AGAIN, due
to new oddities discovered on the Unichrome Pro with faster processors.
Bumped patchlevel and driver date.
1. Improved security check of AGP texture adresses.
2. Hopefully last fix of ring-buffer jump oddities.
3. Added ioctl to check available space and command regulator lag in
ring-buffer. This is needed for 3D application responsiveness.
1. The command verifier was never initialized in the non-core source tree.
2. Check added that the AGP ring buffer has been initialized before
accepting command buffer.
3. Free space check in the AGP buffer is moved to after command
verification, which is more optimal in most cases.
drivers/char/drm/sis_ds.h:88:12: warning: dubious one-bit signed
bitfield drivers/char/drm/sis_ds.h:89:16: warning: dubious one-bit
signed bitfield
Signed-off-by: Randy Dunlap <rddunlap@osdl.org> Signed-off-by: Dave Airlie
<airlied@linux.ie>
driver. It can now handle the 3D OpenGL commands from the Mesa
unichrome driver.
Added vsync frequency detection support. This will be used in the future
for XvMC and better frame timing.
Bumped minor version number and driver date.
code. Remove the "drv" from sisdrv, as it's unnecessary. Use the
drm_pci functions in i915 instead of per-os implementations of the
same. Avoid whitespace within fields in drm_pciids.txt (one of the r300
definitions), since it breaks the bsd pciids script. Tested on sis,
mga, r128. i915 needs more work.
DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH
The first ioctl sets up an area in AGP memory that will be used as the ring
buffer. The second ioctl copies a command buffer from user space memory
to the ring buffer. The third ioctl waits for engine idle until it
returns.
The motivation for this patch is to avoid the wait for engine idle call
before each buffer flush in the current DRI driver. With this patch,
the DRI driver can continue to flush its buffer as long as there is
free space in the ring buffer.
This patch adds an additional copy operation on the command buffer. This
buffer copying is necessary to support multiple DRI clients rendering
simultaneously. Otherwise, more CPU time will be spent in the busy loop
waiting for engine idle between DRI context switch. Even in the single
client case, the tradeoff is reasonable in comparision to the kernel
call to check for free buffer space for the client to render directly
to the ring buffer.
2. Big change to the XvMC part of the SAREA. OpenGL clients will not suffer
from this, and via XvMC is still alpha. Needed to make future additions
to XvMC (More decoders and overlays) possible.
3. Bumped version number to 1.3.0.
allows the mesa drivers to use a single definition of the DRM
sarea/IOCTLS located in the drm driver directory. Adjustments were made
to the 2D drivers to not include these changes. Changes to the mesa
copy of DRM were copied to the DRI copy. XFree86 bug: Reported by:
Submitted by: Reviewed by: Obtained from:
a busid that doesn't correspond to the device the DRM is attached to.
This is a breaking of backwards-compatibility only for the
multiple-DRI-head case with X Servers that don't use interface 1.1.
- Move irq_busid to drm_irq.h and make it only return the IRQ for the
current device. Retains compatibility with previous X Servers, cleans
up unnecessary code. This means no irq_busid on !__HAVE_IRQ, but can be
changed if necessary.
- Bump interface version to 1.2. This version when set signifies that the
control ioctl should ignore the irq number passed in and enable the
interrupt handler for the attached device. Otherwise it errors out when
the passed-in irq is not equal to the device's.
- Store the highest version the interface has been set to in the device.
- Fix a recursion on DRM_LOCK in irq_uninstall on FreeBSD. This leaves
irq_uninstall being done without the lock in some cases, but it was
racey anyways.
the 2D driver initializes MC_FB_LOCATION and related registers sanely
the DRM deduces the layout from these registers
clients use the new SETPARAM ioctl to tell the DRM where they think the
framebuffer is located in the card's address space
the DRM uses all this information to check client state and fix it up if
necessary
This is a prerequisite for things like direct rendering with IGP chips and
video capturing.
server or client to notify the DRM that it expects a certain version of
the device dependent or device independent interface. If the major
doesn't match or minor is too large, EINVAL is returned. A major of -1
means that the requestor doesn't care about that portion of the
interface. The ioctl returns the actual versions in the same struct.
- Introduce DRM DI interface version 1.1. If the server requests version
1.1, then the DRM sets the unique itself according to the busid of the
device it probed, which may then be accessed as normal using getunique.
- Request version 1.1 in libdrm's drmOpenByBusID, allowing the X Server to
request based on a BusID. Introduce a wrapper for DRM_IOCTL_SET_VERSION
and bump libdrm minor version.
- Pass the busid in DRIScreenInit if libdrm can handle both a busid and
name. This allows drmOpenByBusID to be used to find the DRM instead of
just the driver name, which allows us in the future to tie a DRM more
strongly to the device it probed to. Introduce a function
DRICreatePCIBusID which creates a busid in the form pci:oooo:bb:dd.f
similar to linux's pci_name() function. This matches the format used by
the DRM in version 1.1. libdrm knows how to match both this format and
the old PCI🅱️d:f format.
- Use the new DRICreatePCIBusID function in the *_dri.c to request the new,
more exact busid format.
from __HAVE_DMA. This will be useful for adding vblank sync support to
sis and tdfx. Rename dma_service to irq_handler, which is more
accurately what it is.
- Fix the #if _HAVE_DMA_IRQ in radeon, r128, mga, i810, i830, gamma to have
the right number of underscores. This may have been a problem in the
case that the server died without doing its DRM_IOCTL_CONTROL to
uninit.
just a single instance. Moved the PCI ID lists from <card>_drv.c in BSD
to <card>.h. The PCI ID lists include a driver private field, which may
be used by drivers for chip family or other information. Based on work
by jonsmirl.
- Make tdfx_drv.c and tdfx.h match other drivers.
- Fixed up linking of sis shared files.
Tested with Radeon and SiS on Linux and FreeBSD, including a Linux setup
with
2 SiS cards in a machine, but only one head being used (with DRI)
allocate framebuffer memory without sisfb, and a new ioctl to be used
by the X Server which tells the DRM what region of framebuffer memory
to allocate from. Also fixes a possibility to panic the kernel I
believe. Tested on linux with sisfb and FreeBSD (without sisfb) with
new DRI only.
2.5.0. It still has some issues, including a flicker in the fps meter
in tuxracer and I've seen garbage left behind after moving/closing
windows. However, it's usable. Add the Option "EnablePageFlip" "YES" to
use it.
DRM_*MEMORYBARRIER we had were related to an MMIO space. This means
arch-specific code on the BSDs, unfortunately. Also add
DRM_MEMORYBARRIER() and change the DRM_READMEMORYBARRIER()s that used
to be read/write barriers to it.
irq handler in DRM(irq_install). Modify all drivers to ensure irq
handler is removed before cleanup and cleanup is called at takedown.
Remove unused buffer private struct fields in i810, i830. Check for
lock on init/cleanup in all drivers except i810/i830. The current DDX
for i810 and i830 doesn't hold the lock on kernel init (FIXME?).
use correct address for ring read pointer writeback (yes, we seem to have
been running with bogus values for the ring read pointer, which
'worked' because the return value of radeon_wait_ring() is never
checked and the ring usually never fills up)
pageflipping after a mode switch
take current page into account in AdjustFrame(); writing the CRTC offset
via the CP was probably a bad idea as this can happen asynchronously,
reverted
take frame offset into account when flipping pages
handle CRTC2 as well for pageflipping (untested)
preserve GEN_INT_CNTL on mode switches to prevent interrupts from getting
disabled
1) Remove redundant header inclusion
2) Silence bitop on non-long argument warnings (change int to long)
3) Move to ISO C (gcc 2.6) initializers (accepted by older gccs also) All
of these are syntax changes that should not impact functionality.
ioctl. The DRM reads them from memory addresses the chip writes to on
updates. Fall back to reading the registers directly with an old DRM.
(Tim Smith, cleanups by myself)
more flexible and allow older module versions to still work. Might not
be final code if we move over to DRI kernel module version, but will be
if we use XFree86 version. + Only build tdfx.o instead of tdfx-4_1_0.o
since tdfx.o has never changed its API.
- New security model for i810
- Enable i810 dri by default
- New indexed vertex path for mga
- Mga kernel driver rework
- Removed dead files in i810 driver
Thomas Hellstrom
Adam Jackson
Alan Hourihane
Dave Airlie
Michel Daenzer
Roland Scheidegger
Felix Kuehling
Eric Anholt
Jose Fonseca
Keith Whitwell
Jon Smirl
Ville Syrjala
Erdi Chen
Ian Romanick
Leif Delgass
David Dawes
Rik Faith
Jens Owen
Brian Paul
Tim Smith
Jeff Hartmann
Gareth Hughes
Kevin E Martin
Doug Rabson
Daryll Strauss